United States Patent 7,360,130   

Memory with integrated programmable controller

Issued April 15, 2008 to Jed Margolin


An internal processing capability is added to a computer memory by adding a small processor, a small amount of processor RAM memory, a small amount of non-volatile memory, and some logic. During wafer testing the internal processor system allows the memory to be tested at full speed and substantially simultaneously with the testing of other memories on the wafer. At any stage after packaging, the part can be tested by having the host processor read the non-volatile memory, determine what test program to use, load it into the RAM memory, and run the Self-Test program. The internal processor system also allows additional functions such as data searching, data moving, and graphics primitives to be performed entirely within the memory.

Full Patent (PDF, 755 KBytes)
Specification only (html)
Drawings only (PDF, 186 KBytes)
Complete Image File Wrapper (PDF, 8.4 MBytes)

Items of special interest

First Office Action (PDF, 215 KBytes)

References cited by the Examiner in the First Office Action:
U.S. Patent 4,194,113 Method and Apparatus For Isolating Faults in a Logic Circuitry, issued March 18, 1980 to Fulks et al.

U.S. Patent 7,155,637 Method and apparatus for testing embedded memory on devices with multiple processor cores  issued December 26, 2006 to Jarboe, Jr. et al.

U.S. Patent 6,035,380 Integrated Circuit issued March 7, 2000 to Shelton et al.

My Response to the First Office Action (PDF, 5.2 MBytes)

My Response to the First Office Action (html) - The PDF version is the controlling document

Second Office Action (PDF, 163 KBytes) - The Examiner rejected three claims and allowed the other claims

After Final Amendment (PDF, 140 KBytes) - I canceled the rejected claims